(China (Mainland))
Product Summary
The EPM7256AETC100-10N is high-density, high-performance device based on Altera’s second-generation MAX architecture. It operates with a 3.3-V supply voltage and provides 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 4.5 ns, and counter speeds of up to 227.3 MHz.
Parametrics
Absolute maximum ratings: (1)Supply voltage: -0.5V to 4.6V; (2)DC input voltage: -2.0V to 5.75V; (3)DC output current, per pin: -25mA to 25mA; (4)Storage temperature: -65℃ to 150℃; (5)Ambient temperature: -65℃ to 135℃; (6)Junction temperature: 135℃ .
Features
Features: (1)High-performance 3.3-V EEPROM-based programmable logic devices (PLDs) built on second-generation Multiple Array MatriX (MAX)architecture ; (2)3.3-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability; (3)Built-in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1; (4)Supports JEDEC Jam Standard Test and Programming Language (STAPL) JESD-71; (5)Pin-compatible with the popular 5.0-V MAX 7000S devices; (6)High-density PLDs ranging from 600 to 10,000 usable gates; (7)Extended temperature range.
Diagrams
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 EPM7256AETC100-10N |
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IC MAX 7000 CPLD 256 100-TQFP |
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