LPC2101FBD48

Product Summary

The LPC2101FBD48 microcontroller is based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with 8 kB, 16 kB or 32 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical performance in interrupt service routines and DSP algorithms, this increases performance up to 30 % over Thumb mode. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 % with minimal performance penalty. Due to their tiny size and low power consumption, the LPC2101FBD48 are ideal for applications where miniaturization is a key requirement. A blend of serial communications interfaces ranging from multiple UARTs, SPI to SSP and two I2C-buses, combined with on-chip SRAM of 2 kB/4 kB/8 kB, make the LPC2101FBD48 very well suited for communication gateway and protocol converter. The superior performance also makes the device suitable for use as math coprocessor. Various 32-bit and 16-bit timers, an improved 10-bit ADC, PWM features through output match on timer, and 32 fast GPIO lines with up to nine edge or level sensitive external interrupt pin makes the microcontroller particularly suitable for industrial control and medical system.

Parametrics

LPC2101FBD48 absolute maximum ratings: (1)VDD(1V8) supply voltage (1.8 V): -0.5 +2.5 V; (2)VDD(3V3) supply voltage (3.3 V): -0.5 +3.6 V; (3)VDDA analog 3.3 V pad supply voltage: -0.5 4.6 V; (4)Vi(VBAT) input voltage on pin VBAT for the RTC: -0.5 4.6 V; (5)VIA analog input voltage: -0.5 5.1 V; (6)VI input voltage 5 V tolerant I/O pins: -0.5 6.0 V; (7)other I/O pins: -0.5 VDD + 0.5 V; (8)IDD supply current: - 100 mA; (9)ISS ground current: - 100 mA; (10)Tstg storage temperature: -40 125 ℃.

Features

LPC2101FBD48 features: (1)16-bit/32-bit ARM7TDMI-S microcontroller ia tiny LQFP48 package.; (2)2 kB/4 kB/8 kB of on-chip static RAM and 8 kB/16 kB/32 kB of on-chip flash program; (3)memory. 128-bit wide interface/accelerator enables high-speed 70 MHz operation.; (4)ISP/IAP via on-chip bootloader software. Single flash sector or full chip erase in; (5)100 ms and programming of 256 bytes i1 ms.; (6)EmbeddedICE RT offers real-time debugging with the on-chip RealMonitor software.; (7)The 10-bit A/D converter provides eight analog inputs, with conversiotimes as low as 2.44 ms per channel and dedicated result registers to minimize interrupt overhead.; (8)Two 32-bit timers/external event counters with combined sevecapture and sevecompare channels.; (9)Two 16-bit timers/external event counters with combined three capture and sevecompare channels.; (10)Low power Real-Time Clock (RTC) with independent power and dedicated 32 kHz clock input.; (11)Multiple serial interfaces including two UARTs (16C550), two Fast I2C-buses (400 kbit/s), SPI and SSP with buffering and variable data length capabilities.

Diagrams